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(R)
ICL8069
Data Sheet January 2004 FN3172.3
Low Voltage Reference
The ICL8069 is a 1.2V temperature-compensated voltage reference. It uses the band-gap principle to achieve excellent stability and low noise at reverse currents down to 50A. Applications include analog-to-digital converters, digital-toanalog converters, threshold detectors, and voltage regulators. Its low power consumption makes it especially suitable for battery operated equipment.
Features
* Low Bias Current (Min) . . . . . . . . . . . . . . . . . . . . . . .50A * Low Dynamic Impedance * Low Reverse Voltage * Low Cost
Pinouts
ICL8069 (SOIC) TOP VIEW
Ordering Information
PART NUMBER ICL8069CCZR ICL8069DCZR ICL8069CCBA MAXIMUM TEMPCO 0.005%/oC 0.01%/oC 0.005%/ oC TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 70 PACKAGE SIP Package (TO-92) SIP Package (TO-92) 8 Ld SOlC PKG. DWG. # Z3.05 Z3.05 M8.15
NC NC NC V1 2 3 4
8 7 6 5
V+ NC NC NC
ICL8069 (SIP TO-92) TOP VIEW
NC 1
V+ 2
V3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ICL8069 Functional Block Diagrams
SIMPLE REFERENCE (1.2V OR LESS)
+5V
6.8k
ICL8069 4.7F (NOTE 1)
V+ V-
10k VOUT
BUFFERED 10V REFERENCE USING A SINGLE SUPPLY
+15V ICL8069 VV+
15k
7 6 LM108 8 3+ 1k 5 4 2 0.01F 1k 8.2k
+10VOUT
DOUBLE REGULATED 100mV REFERENCE FOR ICL7107 ONE-CHIP DPM CIRCUIT
+5V 2.2k +V V+ ICL8069 V1k REF HI COMMON REF LO 10k ICL7107
2
ICL8069
Absolute Maximum Ratings
Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Note 3 Forward Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Reverse Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A SIP (TO-92) Package. . . . . . . . . . . . . . 200 N/A Power Dissipation Limited by MAX Forward/Reverse Current Maximum Junction Temperature (SOIC Package) . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Ranges ICL8069C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC Unless Otherwise Specified TEST CONDITIONS IR = 500A 50A lR 5mA lR = 50A lR = 500A MIN 1.20 TYP 1.23 15 1 1 0.7 5 1 MAX 1.25 20 2 2 1 UNITS V mV V V ppm/kHR
PARAMETER Reverse Breakdown Voltage Reverse Breakdown Voltage Change Reverse Dynamic Impedance
Forward Voltage Drop RMS Noise Voltage Long Term Stability Breakdown Voltage Temperature Coefficient ICL8069C ICL8069D Reverse Current Range NOTES:
lF = 500A 10Hz F 10kHz, lR = 500A lR = 4.75mA, TA = 25oC IR = 500A, TA = Operating Temperature Range
-
-
0.005 0.01 5
%/ oC %/ oC mA
1.18V to 1.27V
0.050
2. If circuit strays in excess of 200pF are anticipated, a 4.7F shunt capacitor will ensure stability under all operating conditions. 3. In normal use, the reverse voltage cannot exceed the reference voltage. However when plugging units into a powered-up test fixture, an instantaneous voltage equal to the compliance of the test circuit will be seen. This should not exceed 20V.
3
ICL8069 Typical Performance Curves
14 OUTPUT VOLTAGE CHANGE (mV) 12 REVERSE CURRENT (A) 10 8 -55oC 6 4 2 0 -2 10 1 100 1mA 10mA 0.2 0.4 0.6 0.8 1.0 1.2 1.4 REVERSE CURRENT (A) REVERSE VOLTAGE (V) 25oC, 125oC 1mA 100mA
100
10 125oC 25oC -55oC
FIGURE 1. VOLTAGE CHANGE AS A FUNCTION OF REVERSE CURRENT
FIGURE 2. REVERSE VOLTAGE AS A FUNCTION OF CURRENT
1.245 IR = 500A 1.240 OUTPUT VOLTAGE (V)
1.235
1.230
1.225
1.220
1.215 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
FIGURE 3. REVERSE VOLTAGE AS A FUNCTION OF TEMPERATURE
4
ICL8069 Single-In-Line Plastic Packages (SIP)
L
e1
W
Z3.05 (JEDEC STYLE TO-92 MODIFIED) 3 LEAD PLASTIC SINGLE-IN-LINE PACKAGE
e SYMBOL
D
INCHES MIN 0.170 0.014 0.130 0.045 0.095 0.500 0.085 0.045 0.016 0.175 4o MAX 0.195 0.020 0.155 0.055 0.105 0.610 0.095 0.060 0.022 0.195 6o
MILLIMETERS MIN 4.32 0.36 3.30 1.14 2.41 12.70 2.16 1.14 0.41 4.45 4o MAX 4.95 0.51 3.94 1.40 2.67 15.49 2.41 1.52 0.56 4.95 6o NOTES 1 2 1 2 1 Rev. 0 2/94
A b E
E-PIN O 0.0625 A b E S1 R
e e1 L R S1 W
NOTES:
(2X)
D
1. Package body dimensions do not include any mold flash or protrusions. 2. Package outline dimensions do not include burrs. 3. Controlling dimension: INCH.
5
ICL8069 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 6

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